LPC1313FBD48/01 - MCU CORTEX M3 32KB FLASH LQFP48

1. General description
The LPC1311/13/42/43 are ARM Cortex-M3 based microcontrollers for embedded
applications featuring a high level of integration and low power consumption. The ARM
Cortex-M3 is a next generation core that offers system enhancements such as enhanced
debug features and a higher level of support block integration.
The LPC1311/13/42/43 operate at CPU frequencies of up to 72 MHz. The ARM
Cortex-M3 CPU incorporates a 3-stage pipeline and uses a Harvard architecture with
separate local instruction and data buses as well as a third bus for peripherals. The ARM
Cortex-M3 CPU also includes an internal prefetch unit that supports speculative
branching.
The peripheral complement of the LPC1311/13/42/43 includes up to 32 kB of flash
memory, up to 8 kB of data memory, USB Device (LPC1342/43 only), one Fast-mode Plus
I2C-bus interface, one UART, four general purpose timers, and up to 42 general purpose
I/O pins.

Remark: The LPC1311/13/42/43 series consists of the LPC1300 series (parts
LPC1311/13/42/43) and the LPC1300L series (parts LPC1311/01 and LPC1313/01). The
LPC1300L series features the following enhancements over the LPC1300 series:

• Power profiles with lower power consumption in Active and Sleep modes.
• Four levels for BOD forced reset.
• Second SSP controller (LPC1313FBD48/01 only).
• Windowed Watchdog Timer (WWDT).
• Internal pull-up resistors pull up pins to full VDD level.
• Programmable pseudo open-drain mode for GPIO pins.

2. Features and benefits
ARM Cortex-M3 processor, running at frequencies of up to 72 MHz.
ARM Cortex-M3 built-in Nested Vectored Interrupt Controller (NVIC).
32 kB (LPC1343/13)/16 kB (LPC1342)/8 kB (LPC1311) on-chip flash programming
memory.
8 kB (LPC1343/13)/4 kB (LPC1342/11) SRAM.
In-System Programming (ISP) and In-Application Programming (IAP) via on-chip
bootloader software.
Selectable boot-up: UART or USB (USB on LPC1342/43 only).
On LPC1342/43: USB MSC and HID on-chip drivers.LPC1311_13_42_43

Serial interfaces:
 USB 2.0 full-speed device controller with on-chip PHY for device (LPC1342/43
only).
 UART with fractional baud rate generation, modem, internal FIFO, and
RS-485/EIA-485 support.
 SSP controller with FIFO and multi-protocol capabilities.
 Additional SSP controller on LPC1313FBD48/01.
 I2C-bus interface supporting full I2C-bus specification and Fast-mode Plus with a
data rate of 1 Mbit/s with multiple address recognition and monitor mode.
Other peripherals:
 Up to 42 General Purpose I/O (GPIO) pins with configurable pull-up/pull-down
resistors.
 Four general purpose counter/timers with a total of four capture inputs and 13
match outputs.
 Programmable WatchDog Timer (WDT).
 Programmable Windowed Watchdog Timer (WWDT) on LPC1311/01 and
LPC1313/01.
 System tick timer.
Serial Wire Debug and Serial Wire Trace port.
High-current output driver (20 mA) on one pin.
High-current sink drivers (20 mA) on two I2C-bus pins in Fast-mode Plus.
Integrated PMU (Power Management Unit) to minimize power consumption during
Sleep, Deep-sleep, and Deep power-down modes.
Power profiles residing in boot ROM allowing to optimize performance and minimize
power consumption for any given application through one simple function call.
(LPC1300L series, on LPC1311/01 and LPC1313/01 only.)
Three reduced power modes: Sleep, Deep-sleep, and Deep power-down.
Single power supply (2.0 V to 3.6 V).
10-bit ADC with input multiplexing among 8 pins.
GPIO pins can be used as edge and level sensitive interrupt sources.
Clock output function with divider that can reflect the system oscillator clock, IRC
clock, CPU clock, or the watchdog clock.
Processor wake-up from Deep-sleep mode via a dedicated start logic using up to 40 of
the functional pins.
Brownout detect with four separate thresholds for interrupt and one threshold for
forced reset (four thresholds for forced reset on the LPC1311/01 and LPC1313/01
parts).
Power-On Reset (POR).
Integrated oscillator with an operating range of 1 MHz to 25 MHz.
12 MHz internal RC oscillator trimmed to 1 % accuracy over the entire temperature
and voltage range that can optionally be used as a system clock.
Programmable watchdog oscillator with a frequency range of 7.8 kHz to 1.8 MHz.
System PLL allows CPU operation up to the maximum CPU rate without the need for a
high-frequency crystal. May be run from the system oscillator or the internal RC
oscillator.
For USB (LPC1342/43), a second, dedicated PLL is provided.
Code Read Protection (CRP) with different security levels.NXP Semiconductors LPC1311/13/42/43
32-bit ARM Cortex-M3 microcontroller
Unique device serial number for identification.
Available as 48-pin LQFP package and 33-pin HVQFN package.

3. Applications
eMetering
Lighting
Alarm systems
White goods

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© NXP B.V. 2011. All rights reserved.