Features
Short-circuit shutdown with clock generator
Four driver circuits for controlling power transistors
Overload and short-circuit signaling
General Description
The IC comprises four driver circuits capable of driving power transistors for high output currents.
The output transistors are protected against short-circuit to ground and supply voltage.
The input threshold can be adjusted between 1.5 V and 7 V. Overload or shortcircuit failure at an output will be indicated at pin SQ (signaling output).
Functional Description
Each driver circuit has one active high driver input Dl and a common enable input (ENA) (active high) is provided for all stages.
The (Q) outputs are designed to drive the output transistors.
The load current is sampled via pin W. If the load current exceeds the preset value, the output stage switches off. Switching-on again is provided by the built-in clock generator.
Its operation requires an external capacitor C T at pin C. If C T is bridged by a break-key, switching on can only be carried out by operating a key.
The duty cycle of the clock generator is 1:50 (e.g. 40 µs/2 ms with C T = 33 nF).
In case of overcurrent or short-circuit failure at any output stage the signaling output (SQ) will go low.
In clock-governed operation (i.e. when there is automatic switching on by the clock and not by a key), SQ goes high and low at the clock rate as long as a shortcircuit or overload exists.
SQ is an open-collector output. Unused W pins must be connected to V s .
Open W pins would simulate a short-circuit and activate the signaling output.